前款规定的期限，从违反治安管理行为发生之日起计算；违反治安管理行为有连续或者继续状态的，从行为终了之日起计算。
But building HS2 has changed the landscape along its route, cutting into fields and communities, and dividing opinion.
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The tradeoff is complexity. The microcode must be carefully arranged so that the instructions in delay slots are either useful setup for both paths, or at least harmless if the redirect fires. Not every case is as clean as RETF. When a PLA redirect interrupts an LCALL, the return address is already pushed onto the microcode call stack (yes, the 386 has a microcode call stack) -- the redirected code must account for this stale entry. When multiple protection tests overlap, or when a redirect fires during a delay slot of another jump, the control flow becomes hard to reason about. During the FPGA core implementation, protection delay slot interactions were consistently the most difficult bugs to track down.
This sounds reasonable until you see how easily it goes wrong: